Engineering
Huawei Moved Its Next AI Chip Up Nine Months. The Part Worth Reading Twice Was About Light
At Huawei Connect 2026 the company pulled the Ascend 960DT forward to Q1 2027, but the accelerator date is a supply signal, not a silicon one. The real announcement was Hi-ONE, a near-packaged-optics interconnect Huawei says is the first ready for volume manufacture.
MAI
Huawei opened Huawei Connect 2026 in Shanghai on Thursday by moving its next AI accelerator forward by nine months. Rotating chairman David Wang said the Ascend 960DT, the training-and-decode part of the line, will be ready in the first quarter of 2027 rather than late in the year, and that the inference-oriented 960PR follows in the third quarter, a quarter earlier than planned. The Ascend 970 is still pencilled in for 2028 and the 980 for 2029.
We're evolving our Ascend chip series on a one-generation-a-year cycle.
That is the headline, and it is the least interesting thing Huawei said. A pulled-forward tape-out date is a statement about supply, not about silicon: it tells you orders are stacked up and that the company believes it can get parts out of SMIC's lines fast enough to meet them. It does not tell you the chip is any closer to what Nvidia ships. The announcement worth reading twice was the one about light.
The constraint Huawei cannot engineer around, and the one it can
Export controls have left Huawei on domestic process nodes and domestic memory supply. Per-chip, that gap is not closing: the current Ascend 950DT carries 144GB of memory at roughly 4TB/s, numbers that were competitive two Nvidia generations ago. Huawei has spent two years answering this the only way the physics allows — by making the unit of competition the machine rather than the die. Last year's Atlas 950 SuperPoD wired 8,192 accelerators into one logical system. Eric Xu used this year's keynote to name the umbrella architecture, Peerium, running over Huawei's UnifiedBus interconnect.
Scaling that way has a hard ceiling, and the ceiling is interconnect. Wiring thousands of weak accelerators into one coherent machine means moving petabytes per second between racks, and beyond a few metres of copper that means optics — which historically means pluggable optical modules, which means cost, power draw and a failure rate that climbs linearly with module count. A supernode that fails a link every few hours is not a training cluster.
Huawei's answer is Hi-ONE, a near-packaged-optics interconnect engine rated at 7.2 Tbit/s with an integrated light source. Near-packaged optics moves the optical engine onto the same substrate as the switch silicon instead of out at the faceplate, cutting the electrical run, the power per bit and the number of discrete parts that can fail. Huawei claims it is the first NPO product ready for volume manufacture. That claim is checkable in a way benchmark scores are not, and if it holds it is a real engineering result — Broadcom, Marvell and Nvidia have all been working co-packaged and near-packaged optics for years without shipping at this density.
What Huawei says the system does
| System | Scale | Claimed performance | Memory |
|---|---|---|---|
| Atlas 960E SuperPoD | 4,096 NPUs | 8 EFLOPS (FP8) | 1 PB HBM |
| TaiShan 950 SuperPoD | 4,096 nodes | — | 256 TB unified pool |
| Atlas 950 SuperPoD (2025) | 8,192 NPUs | ~8 EFLOPS (FP8) | — |
Every number in that table is Huawei's own, taken from its keynote release; none has been independently measured, and the 99.8% system availability figure Huawei quotes for the 960E is a vendor reliability claim, not a published SLA. Note also that 4,096 cards is well short of the 15,488-card Atlas 960 configuration Huawei signposted a year ago — analyst Rui Ma flagged the discrepancy within hours. Either the 960E is a denser, smaller variant of a larger family still to come, or the ambition has been trimmed. Huawei has not said which, and the secondary reporting is not consistent on the point.
Why it matters beyond Shanghai
The pull-forward lands a week before a scheduled Trump–Xi meeting, and it is hard to read the timing as accidental. But the durable signal is architectural. If Huawei can build a 4,096-card supernode that stays up, on domestic silicon, with optics it manufactures itself, then the export-control theory of change — that denying leading-edge lithography denies frontier-scale compute — degrades into a tax on efficiency rather than a wall. Chinese labs will pay more watts and more floor space per unit of training throughput. They will not be stopped.
What would falsify that: an outside party running a real training workload on a full 960E and publishing the numbers. Until then, this is a roadmap and a set of specifications, and the gap between a roadmap and a rack that holds together for a ninety-day pretraining run is exactly where Huawei's last three announcements have lived.
Sources: Huawei Connect 2026 keynote release: "Advancing the Agentic World, Building a Solid Silicon Foundation" · South China Morning Post · TechCrunch · TrendForce · DigiTimes · HUAWEI CONNECT 2026